1. Technical Field
Example embodiments of the present invention relate to phase lock detection technology, and more specifically, to a lock detector capable of rapidly determining whether phase lock is made and a clock generator including the same.
2. Related Art
A phase-locked loop (PLL) circuit is a circuit which continuously compares a phase of a reference clock with a phase of an output clock and corrects a frequency based on a result thereof such that the output clock always maintains a constant frequency, and is one of basic circuits generally included in an electronic system.
Generally, the phase-locked loop circuit includes a lock detection circuit which determines whether a phase of an output clock and a phase of a reference clock match. Here, a lock state refers to a state in which the phase of the output clock and the phase of the reference clock match, and circuits operating based on the output clock of the phase-locked loop circuit use an output of the phase-locked loop circuit in a lock state.
However, a lock detection circuit included in a conventional phase-locked loop circuit divides a clock signal output from a voltage controlled oscillator (VCO) into a clock signal at a low frequency and then performs lock detection based on the divided clock signal. Accordingly, a lock detection speed is low.
Further, the conventional lock detection circuit cannot exactly detect the lock state of the phase-locked loop circuit since the conventional lock detection circuit does not consider a property of parameters of respective components of the phase-locked loop circuit varying with a process, a voltage, and a temperature (PVT), or the like.